佛萨奇公排系统模式开发源码部署（Demo）

常见的SPI通信实现一般包括4根线，CLK,CS,MOSI,MISO，协议的原理比较简单，其实就是在时钟的不同边沿处选择输入还是输出，当选择是输入的时候，数据线要有保持数据的能力；当输出的时候，数据线要能够改变电平来输出数据。

概况

The W25Q128BV (8M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1μA for power-down. The W25Q128BV array is organized into 65,536 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q128BV has 4,096 erasable sectors and 256 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See Figure 2.) The W25Q128BV supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual Output and 280MHz (70MHz x 4) for Quad SPI when using the Fast Read Quad SPI instructions. These transfer rates can out perform standard Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation. A Hold pin, Write Protect pin and programmable write protection, with top, bottom or complement array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification with a 64-bit Unique Serial Number.

根据CLK的极性（两个采样沿，空闲时电平是高是低），SPI可以分4种工作模式（CLK的排列组合），这里不介绍工作模式（因为图也不一定对）。主要说一下以下几点

• 无论是哪种模式，当采集的时候，电平要保持住，不采集的时候，电平可以改变
• 由于CLK的存在，采样和变更电平的是要遵守时序的
• 这里注意一下SDI和SDO的流向，当SCLK上升沿时，对主机M是输入，采样阶段，因此SDI数据是保持住的，当SCLK下降沿时，对主机M是输出，SDO是保持状态

从上面的介绍可以看出，实现SPI最少可以只需要2根线，即SCL和SDA，由SCL提供时序，SDA用来传输数据。这时由于一个时钟周期内只能提供两个边沿，因此只能是一个边沿采样，一个边沿输出（改变电平）。

回到W25Q128上：引脚描述

这里主要介绍几个引脚，IO，写保护，保持。IO这里由于支持3种多路SPI方式，因此当采用标准SPI时，DI脚输入，在CLK上升沿写入地址或数据，DO在CLK下降沿输出。

写保护和保持均由寄存器2控制，当寄存器2设置为双路或4路时，写保护和保持的原有功能失效。