blocks|key|167396|text|这些芯片可能不在当前(最初的问题)芯片中，但它们都有一个共同的主题--原子内存操作。它们的目的通常是用于线程之间的同步，它们在指令集级别上的包含可能表明Atmel计划推出一种多核AVR芯片。因为它们现在被指定了，所以工具供应商已经可以将它们添加到汇编程序中了，但是在芯片得到指令之前，它们不会对此做什么。(编辑:事实证明，另一个核心是USB外围设备，而不是CPU。感谢avakar提供的信息。)|type|unstyled|depth|inlineStyleRanges|entityRanges|data|167397|我从Atmel+AVR+8位指令集手册上读到的行为|offset|length|167398|LAC+-加载和清除，将内存内容*Z加载到寄存器Rd中，同时清除在Rd中设置的*Z中的位。|167399|LAS加载和设置同时在寄存器中设置的存储器位置中设置位，并用存储器位置的先前内容加载寄存器。例如，对于单比特互斥非常有用。|167400|LAT+-+Load和Toggle；和LAS一样，但它使用的不是按位的或，而是使用按位的xor，这样就可以切换位。|167401|；只是交换内存和注册内容。|167402|它们都是RAM访问指令(07/2014引用状态，它们需要两个周期)，它们将操作组合在一起，这样它们还可以使代码比当前更快地需要RAM。|167403|entityMap|0|LINK|mutability|MUTABLE|url|http://www.atmel.com/images/Atmel-0856-AVR-Instruction-Set-Manual.pdf^0|0|2|H|0|0|0|0|0|0|0^^$0|@$1|2|3|4|5|6|7|X|8|@]|9|@]|A|$]]|$1|B|3|C|5|6|7|Y|8|@]|9|@$D|Z|E|10|1|11]]|A|$]]|$1|F|3|G|5|6|7|12|8|@]|9|@]|A|$]]|$1|H|3|I|5|6|7|13|8|@]|9|@]|A|$]]|$1|J|3|K|5|6|7|14|8|@]|9|@]|A|$]]|$1|L|3|M|5|6|7|15|8|@]|9|@]|A|$]]|$1|N|3|O|5|6|7|16|8|@]|9|@]|A|$]]|$1|P|3|-4|5|6|7|17|8|@]|9|@]|A|$]]]|Q|$R|$5|S|T|U|A|$V|W]]]]

These are probably not around in current (as of initial question) chips, but all have a common theme - atomic memory operations. Their purpose is typically for synchronisation between threads, and their inclusion at an instruction set level probably indicates that Atmel are planning to launch a multi-core AVR chip. Since they're specified now tool vendors can add them to assemblers already, but they won't make a big deal of that until chips have the instructions. (Edit: As it turns out, the other core is the USB peripheral, not a CPU. Thanks to avakar for that information.)

The behaviour, as I read it from the <a href="http://www.atmel.com/images/Atmel-0856-AVR-Instruction-Set-Manual.pdf" rel="nofollow">Atmel AVR 8-bit Instruction Set Manual</a>:

LAC - Load and Clear, loads memory contents *Z into register Rd while simultaneously clearing bits in *Z that were set in Rd. 

LAS - Load And Set simultaneously sets bits in a memory location that were set in a register, and loads the register with the prior contents of the memory location. Very useful for single-bit mutexes, for instance.

LAT - Load And Toggle; like LAS, but instead of bitwise or, it uses bitwise xor, thus toggling bits. 

XCH - Exchange; simply exchanges memory and register contents. 

All of them are RAM access instructions (07/2014 reference states they take two cycles), which combine operations so they could also make code that needs RAM faster than it currently is.

blocks|key|167434|text|小但重要的细节要强调:当Z指向“真正的”SRAM时，LAS、LAC和LAT指令可以工作。这不是(内存映射)寄存器等等。因此，实际上，这些寄存器对于您自己的(OS)数据或XMega+USB模块都是有用的，没有其他外设和模块。|type|unstyled|depth|inlineStyleRanges|entityRanges|data|167435|这是一个遗憾(例如，操作PMIC.CTRL标志非常方便)，但它真的不起作用。测试过了。看起来LAS、LAC和LAT在应用于内存映射寄存器时具有与XCH+(+Rd和(Z)之间的交换，但没有一点旋转)相同的效果。|167436|entityMap^0|0|0^^$0|@$1|2|3|4|5|6|7|F|8|@]|9|@]|A|$]]|$1|B|3|C|5|6|7|G|8|@]|9|@]|A|$]]|$1|D|3|-4|5|6|7|H|8|@]|9|@]|A|$]]]|E|$]]

Small but important detail to emphasize: the LAS, LAC and LAT instructions work when Z points to "real" SRAM only. That is not (memory mapped) registers etc. So, in fact, these are useful either for your own (OS) data or XMega USB module, no other peripherals and modules.

It is a pity (as it would be really handy for manipulating PMIC.CTRL flags for example), but it really does not work. Tested. It looks like that LAS, LAC and LAT has the same effect as XCH (exchange between Rd and (Z) but no bit twiddling) when applied on memory mapped registers.

Looking at the AVR instruction set there are four instructions added in 2010

<pre><code>LAC load and clear
LAS load and set
LAT load and toggle
XCH load and exchange
</code></pre>

<ol>
<li>Does anyone know what chips have these instructions</li>
<li>What tools support these instructions</li>
<li>More information on what they do 

(Z) &lt;- Rd v (Z), Rd &lt;- (Z)</li>
</ol>

does that imply that Rd and (Z) get the same value or does Rd get the pre-modified value of what was pointed to by Z?

More detail about new AVR instructions LAC, LAS, LAT and XCH

翻译质量差，导致语言生硬或混乱。

没有提供实际的解决方法或示例。

解答不清晰，无法理解或解决问题。

页面排版不美观，阅读体验差。

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看看AVR指令集，2010年增加了四个指令LAC load and clearLAS load and setLAT load and toggleXCH load and exchange有人知道这些指令是什么芯片吗？哪些工具支持这些说明？关于他们做什么的更多信息(Z) <- Rd v (Z)，Rd <- (Z)这是...

问有关新AVR指令LAC、LAS、LAT和XCH的更详细信息
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