blocks|key|804917|text|正如Mat所写的，这可能是不合理的范围。不过，我会尽量把注意力集中在问题的总和上，就像我会把注意力集中在一个范围合理的问题上一样，希望这将有助于你开始研究。|type|unstyled|depth|inlineStyleRanges|entityRanges|data|804918|“抢占”和“上下文切换”有什么区别？|blockquote|804919|抢占是指在没有参与的情况下中断一个过程的行为。在这种情况下，这可能意味着计时器中断将触发。这个词来源于抢占的一个法律概念:在其他人之前或优先要求或购买的行为或权利。就您的目的而言，这意味着当计时器中断触发时，中断服务例程(ISR)比以前运行的代码有更多的优先权。这根本不需要涉及内核；您可以在任何ISR中运行代码，这些ISR将先发制人地运行。|offset|length|804920|上下文切换是当OS代码(先发制人地运行)在一个进程或线程的上下文和另一个进程或线程的上下文之间改变处理器的状态(寄存器、模式和堆栈)时发生的情况。处理器的状态可能在一个线程中的某一行代码中。它将具有寄存器中的临时数据、某个内存区域的堆栈指针以及其他状态信息。抢占式操作系统可以将此状态存储到静态内存或进程堆栈中，并加载前一个进程的状态。这就是所谓的上下文切换。|804921|抢占核和非抢占核之间的主要区别是什么？程序员需要做什么工作才能使内核具有先发制人的功能？|804922|在抢占式内核中，中断可以在任意两个程序集指令(称为“序列点”)之间触发。在非抢占内核中，正在运行的进程必须调用yield()函数以允许其他线程运行。先发制人的内核更复杂，但提供了一个更好的并发错觉。使用setjmp.h可以非常简单地完成非占优内核，但是每个线程必须定期调用yield()，否则其他线程将无法运行。|style|CODE|804923|当调用像yield()这样的函数时，处理器的状态会自动存储。当您想要使您的操作系统抢占性时，您必须手动存储此信息。|804924|3如何创建和使用用户模式？
ARM文档表示，在用户模式下，任何切换到特权模式的指令都将被视为未定义的指令。|804925|对，是这样。但是，他们也说任何中断都会自动在特权模式下运行。在ARM系统上，您可以使用svc指令生成软件中断。SVC代码(操作系统的一部分)将能够在特权模式下运行。|804926|4如果是这样的话，用户空间程序使用内核代码的唯一方法是syscalls？|804927|对，是这样。至少，这是唯一安全或正确的方法。|804928|5内核如何响应用户空间或与用户空间交互？|804929|在ARM上，SVC指令可以得到一个8位的值.这可用于生成256个系统，如产量、启用中断、禁用中断或任何您需要的内容。如果需要，还可以选择创建共享内存或消息传递交互机制。|804930|6这是否意味着启动后(在简单系统中)唯一的内核线程将是空闲线程？|804931|这完全取决于您如何设计您的系统。如果只在创建了所有线程之后才选择启动内核，那么可能更简单--这样您就不需要担心线程的动态分配了。或者，您可以从空闲线程开始，然后(通过远程shell+)添加其他线程？我认为你希望至少有一个用户线程持续运行.)|804932|7如果内核代码和数据所在的页面在切换到用户进程时被取消映射，那么在syscall或中断上，内核代码如何执行而不被映射到虚拟地址空间？|804933|就像内核模式代码在特权模式下运行一样，即使代码以前在用户模式下执行，即使进程代码使用不同的地址空间，内核模式代码也将从主堆栈指针(MSP)运行。|804934|8‘可抢占的内核’仅仅意味着内核的设计方式是在执行内核代码时安全地进行上下文切换吗？或者它是否需要做更多的工作，如果有的话？|804935|我认为这意味着内核可以抢占用户代码，而不是内核本身可以被抢占。任何东西打断内核都是困难的，也是不寻常的。这需要更多的工作，我很想知道你为什么想要它。|804936|entityMap|0|LINK|mutability|MUTABLE|url|http://dictionary.reference.com/browse/preemption^0|0|0|1F|2|0|0|0|0|1J|7|2T|8|3S|7|0|4|7|0|0|17|3|0|0|0|0|0|0|0|0|0|0|0^^$0|@$1|2|3|4|5|6|7|1O|8|@]|9|@]|A|$]]|$1|B|3|C|5|D|7|1P|8|@]|9|@]|A|$]]|$1|E|3|F|5|6|7|1Q|8|@]|9|@$G|1R|H|1S|1|1T]]|A|$]]|$1|I|3|J|5|6|7|1U|8|@]|9|@]|A|$]]|$1|K|3|L|5|D|7|1V|8|@]|9|@]|A|$]]|$1|M|3|N|5|6|7|1W|8|@$G|1X|H|1Y|O|P]|$G|1Z|H|20|O|P]|$G|21|H|22|O|P]]|9|@]|A|$]]|$1|Q|3|R|5|6|7|23|8|@$G|24|H|25|O|P]]|9|@]|A|$]]|$1|S|3|T|5|D|7|26|8|@]|9|@]|A|$]]|$1|U|3|V|5|6|7|27|8|@$G|28|H|29|O|P]]|9|@]|A|$]]|$1|W|3|X|5|D|7|2A|8|@]|9|@]|A|$]]|$1|Y|3|Z|5|6|7|2B|8|@]|9|@]|A|$]]|$1|10|3|11|5|D|7|2C|8|@]|9|@]|A|$]]|$1|12|3|13|5|6|7|2D|8|@]|9|@]|A|$]]|$1|14|3|15|5|D|7|2E|8|@]|9|@]|A|$]]|$1|16|3|17|5|6|7|2F|8|@]|9|@]|A|$]]|$1|18|3|19|5|D|7|2G|8|@]|9|@]|A|$]]|$1|1A|3|1B|5|6|7|2H|8|@]|9|@]|A|$]]|$1|1C|3|1D|5|D|7|2I|8|@]|9|@]|A|$]]|$1|1E|3|1F|5|6|7|2J|8|@]|9|@]|A|$]]|$1|1G|3|-4|5|6|7|2K|8|@]|9|@]|A|$]]]|1H|$1I|$5|1J|1K|1L|A|$1M|1N]]]]

As Mat wrote, this is probably unreasonably scoped. However, I'll try to devote as much attention to the sum of the questions as I would to one reasonably scoped question, in the hopes that this will help you to begin researching.

<blockquote>
 1 What is the difference between "preemption" and "context switch" ?
</blockquote>

Preemption is the act of interrupting a process without its involvement. In this context, that probably means a timer interrupt will fire. The word comes from a legal concept of <a href="http://dictionary.reference.com/browse/preemption" rel="noreferrer">preemption</a>: the act or right of claiming or purchasing before or in preference to others. For your purposes, that means that when the timer interrupt fires, that the interrupt service routine (ISR) has preference over the code which was previously running. This doesn't necessarily need to involve a kernel at all; you can have code running in any ISR which will run preemptively.

A context switch is what happens when the OS code (running preemptively) alters the state of the processor (the registers, mode, and stack) between one process or thread's context and another. The state of the processor may be at a certain line of code in a one thread. It will have temporary data in registers, a stack pointer at a certain region of memory, and other state information. A preemptive OS can store this state (either to static memory or onto the processes' stack) and load the state of a previous process. This is known as a context switch.

<blockquote>
 2 What are the key differences between a preemptive and nonpreemptive kernel ? What all work is required from a programmer to make the kernel preemptive ?
</blockquote>

In a preemptive kernel, an interrupt can fire in between any two assembly instructions (known as 'sequence points'). In a non-preemptive kernel, the running process must call a <code>yield()</code> function to allow the other threads to run. Preemptive kernels are more complex, but provide a better illusion of concurrency. Non-premptive kernels can be done very simply with <code>setjmp.h</code>, but each thread must regularly call <code>yield()</code> or the other threads will not run. 

When a function like <code>yield()</code> is called, the state of the processor is stored automatically. When you want to make your OS preemptive, you must store this information manually.

<blockquote>
 3 How to create and work with user mode ?
 
 ARM docs say that in user mode, any instruction switching to a privileged mode will be treated as undefined instruction.
</blockquote>

Correct. However, they also say that any interrupt will run in privileged mode automatically. On an ARM system, you can use the <code>svc</code> instruction to generate a software interrupt. The SVC code (part of your OS) will then be able to run in privileged mode.

<blockquote>
 4 If so, the only way for a userspace program to use kernel code is syscalls ?
</blockquote>

Correct. At least, this is the only safe or correct way.

<blockquote>
 5 How does a kernel respond or interact with userspace then ?
</blockquote>

On ARM, the SVC instruction can get an 8-bit value. This can be used to generate 256 syscalls such as yield, enable interrupts, disable interrupts, or whatever you need. You may also choose to create a shared memory or message passing interaction mechanism if you need that.

<blockquote>
 6 Does that mean the only kernel thread after booting (in a simple system) would be the idle thread ?
</blockquote>

That depends entirely on how you design your system. It's probably simpler if you choose to start your kernel only after all your threads have been created - that way you don't need to worry about dynamically allocating threads. Or, you can start with the idle thread and add other threads later (through a remote shell? I think you'd want at least one user thread running consistently...)

<blockquote>
 7 If the Page where kernel code and data resides is unmapped when switching to a user process, then on a syscall or interrupt, how does the kernel code execute without being mapped in the virtual address space ?
</blockquote>

Just as kernel mode code runs in privileged mode even if the code was previously executing in user mode, so will kernel mode code run from the main stack pointer (MSP) even if the process code was using a different address space.

<blockquote>
 8 Does a 'preemptible kernel' only mean that the kernel was designed in a way that it would be safe to have context switch during execution of kernel code ? or does it require more work to be done if any ?
</blockquote>

I think that means that the kernel can preempt the user code, not that the kernel itself can be preempted. It would be difficult and unusual for anything to interrupt the kernel. That would require more work, and I'm struggling to see why you'd want it.

blocks|key|804959|text|我将尽力为您(谢天谢地)粗体请求提供服务，而不是回答您列举的每一个问题：|type|unstyled|depth|inlineStyleRanges|entityRanges|data|804960|回答所有问题的一个更好的选择是，如果你能给我一本免费的实时操作系统(甚至一本免费的书)给arm，最好是|blockquote|offset|length|style|BOLD|804961|Micrium的uC/OS-III是一个基于优先级的实时内核，它支持同步和异步抢占。而且，幸运的是(我回答的原因)是有一本免费的书，而且源代码也是可用的。|804962|转到uC/OS-III主页，在左边，您将看到一个视频链接，讨论源代码可用性(“uC/OS源代码是可用的”)。|804963|至于书籍，请转到项目页面，并选择与目标最接近的书。90%25的材料是相同的；只有特定于CPU的内容(如上下文切换、中断和初始化)将因书而异。|804964|你必须注册才能下载这本书&这段代码对我来说是公平的。|804965|祝你好运，玩得开心。谢谢你大胆地提出你的最终要求/目标，这使这件事变得容易多了。|804966|entityMap|0|LINK|mutability|MUTABLE|url|http://micrium.com/page/products/rtos/os-iii|1|http://micrium.com/page/downloads/os-iii_projects^0|0|0|1F|0|0|2|B|0|0|8|4|1|0|0|0^^$0|@$1|2|3|4|5|6|7|12|8|@]|9|@]|A|$]]|$1|B|3|C|5|D|7|13|8|@$E|14|F|15|G|H]]|9|@]|A|$]]|$1|I|3|J|5|6|7|16|8|@]|9|@]|A|$]]|$1|K|3|L|5|6|7|17|8|@]|9|@$E|18|F|19|1|1A]]|A|$]]|$1|M|3|N|5|6|7|1B|8|@]|9|@$E|1C|F|1D|1|1E]]|A|$]]|$1|O|3|P|5|6|7|1F|8|@]|9|@]|A|$]]|$1|Q|3|R|5|6|7|1G|8|@]|9|@]|A|$]]|$1|S|3|-4|5|6|7|1H|8|@]|9|@]|A|$]]]|T|$U|$5|V|W|X|A|$Y|Z]]|10|$5|V|W|X|A|$Y|11]]]]

Rather than answering each of your enumerated questions, I'll do my best to service your (thankfully) bolded request:

<blockquote>
 A better alternative to answering all the questions would be if you could refer to me a freely available RTOS (or even a free book) for arm preferably
</blockquote>

Micrium's uC/OS-III is a priority-based real-time kernel that (of course) supports both synchronous and asynchronous preemption. And, as luck would have it (and the reason I'm replying) is that there is a free book available, and also the source code is available.

Head over to the <a href="http://micrium.com/page/products/rtos/os-iii" rel="nofollow">main page for uC/OS-III</a> and on the left you'll see a link for a video talking about source code availability ("uC/OS-III Source is available"). 

As far as books go, go over to the <a href="http://micrium.com/page/downloads/os-iii_projects" rel="nofollow">projects page</a>, and choose the book that most closely matches your target. 90% of the material is the same; only the CPU-specific stuff (like context switching, interrupts &amp; initialization) will vary from book to book.

You'll have to register to download the book &amp; the code, seems fair to me.

Good luck and have fun. Thanks for putting in bold your ultimate request / goal, that made this much easier.

blocks|key|1624955|text|我的印象是uC/OS-III不是免费的，而是有执照的。|type|unstyled|depth|inlineStyleRanges|entityRanges|data|1624956|FreeRTOS+(http://www.freertos.org/)是一个很棒的免费实时操作系统，并且解释得很好。|offset|length|1624957|你绝对应该看看那里|1624958|entityMap|0|LINK|mutability|MUTABLE|url|http://www.freertos.org/^0|0|A|O|0|0|0^^$0|@$1|2|3|4|5|6|7|P|8|@]|9|@]|A|$]]|$1|B|3|C|5|6|7|Q|8|@]|9|@$D|R|E|S|1|T]]|A|$]]|$1|F|3|G|5|6|7|U|8|@]|9|@]|A|$]]|$1|H|3|-4|5|6|7|V|8|@]|9|@]|A|$]]]|I|$J|$5|K|L|M|A|$N|O]]]]

I was under the impression that the uC/OS-III was not free, but licensed.

A great free RTOS, and very well explained, is the FreeRTOS (http://www.freertos.org/)

You should definitely take a look there

A little intro,

I am currently writing a small (read tiny) RTOS kernel, well it's supposed to be monolithic with most stuff in the kernel. However I can't find much information on a few things listed below, It would be a lot helpful and besides this, it isn't actually some kind of university project but something I'm doing at my own will.

A better alternative to answering all the questions would be if you could refer to me a freely available RTOS (or even a free book) for arm preferably which implement userspace and are preemptible (but not complex like linux). Linux has some of the worst documentation I've seen till now (I did try figuring things out from linux code but there are just a tons of defines scattered through a million files and function hooks with wierd names and stuff getting renamed every version also getting moved sometimes...)

<ol>
<li>What is the difference between "preemption" and "context switch" ?</li>
<li>What are the key differences between a preemptive and nonpreemptive kernel ? What all work is required from a programmer to make the kernel preemptive ?</li>
<li>How to create and work with user mode ?

ARM docs say that in user mode, any instruction switching to a privileged mode will be treated as undefined instruction. </li>
<li>If so, the only way for a userspace program to use kernel code is syscalls ? </li>
<li>How does a kernel respond or interact with userspace then ? </li>
<li>Does that mean the only kernel thread after booting (in a simple system) would be the idle thread ?</li>
<li>If the Page where kernel code and data resides is unmapped when switching to a user process, then on a syscall or interrupt, how does the kernel code execute without being mapped in the virtual address space ?</li>
<li>Does a 'preemptible kernel' only mean that the kernel was designed in a way that it would be safe to have context switch during execution of kernel code ? or does it require more work to be done if any ?</li>
</ol>

Oh and if such multiple questions are not allowed here, sorry, couldn't find anything about that.

difference between Preemption and context switch

翻译质量差，导致语言生硬或混乱。

没有提供实际的解决方法或示例。

解答不清晰，无法理解或解决问题。

页面排版不美观，阅读体验差。

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稍微介绍一下，我目前正在编写一个小的(读小的) RTOS内核，好吧，它应该与内核中的大部分内容保持一致。然而，我在下面列出的几件事情上找不到多少信息，这将是很有帮助的，除此之外，它实际上不是某种大学项目，而是我自己愿意做的事情。是回答所有问题的更好的选择，如果您可以为arm推荐一本免费的RTOS (甚至是一本免费的书)...

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