这是生成所述错误的代码段:
architecture sm1 of SM is
...
signal sum_1 : float (5 downto -27);
...
begin
N_PROCESS: process (N, j, CLK)
...
begin
if rising_edge(CLK) then
...
sum_1 <= to_float(0);
...
end if;
end process;
end sm1;误差与sum_1信号有关。有人能解释一下为什么会发生这种情况,以及如何解决吗?
发布于 2014-03-23 15:09:53
https://stackoverflow.com/questions/22589198
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