blocks|key|570376|text|不确定这在STM32F7上是否相同，但这是如何使用STM32F4上的CMSIS正确地完成它(实际上应该在任何Cortex-M3/4(/7?)提供此模块)：|type|unstyled|depth|inlineStyleRanges|entityRanges|data|570377|CoreDebug->DEMCR+%7C=+CoreDebug_DEMCR_TRCENA_Msk;
DWT->CYCCNT+=+0;
DWT->CTRL+%7C=+DWT_CTRL_CYCCNTENA_Msk;|code-block|syntax|javascript|570378|您也必须启用跟踪模块。注意，代码不是中断安全的！通常，您应该让计数器自由运行，并采取不同的快照的时间。|570379|只需确保您的工具链不使用干扰您的代码。OpenOCD/gdb不确定提供手动分析功能的工具如何。|570380|正如我在评论中所强调的：不要使用一些自制的寄存器定义。ST+(和ARM)为您应该使用的标准外围模块(DWT和CoreDebug实际上是ARM+IP)提供CMSIS。这包括不使用魔术数字，而是使用定义的常量/宏。|offset|length|style|BOLD|570381|更多信息可在“架构参考手册”中找到。警告：还有一个“架构应用程序级参考手册”，这不是您想要的。|570382|entityMap^0|0|0|0|0|C|2|0|I|3|0^^$0|@$1|2|3|4|5|6|7|U|8|@]|9|@]|A|$]]|$1|B|3|C|5|D|7|V|8|@]|9|@]|A|$E|F]]|$1|G|3|H|5|6|7|W|8|@]|9|@]|A|$]]|$1|I|3|J|5|6|7|X|8|@]|9|@]|A|$]]|$1|K|3|L|5|6|7|Y|8|@$M|Z|N|10|O|P]]|9|@]|A|$]]|$1|Q|3|R|5|6|7|11|8|@$M|12|N|13|O|P]]|9|@]|A|$]]|$1|S|3|-4|5|6|7|14|8|@]|9|@]|A|$]]]|T|$]]

Not sure if that is identical on the STM32F7, but this is how to do it correctly using the CMSIS headers on a STM32F4 (should actually work on any Cortex-M3/4(/7?) which provides this module):

<pre><code>CoreDebug-&gt;DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
DWT-&gt;CYCCNT = 0;
DWT-&gt;CTRL |= DWT_CTRL_CYCCNTENA_Msk;
</code></pre>

You have to enable the trace module, too. Caution the code is not interrupt-safe! In general, you should leave the counter just free running and take differences of snapshots for timing.

Just make sure your toolchain does not use interfere with your code. OpenOCD/gdb do not, not sure how about tools which provide a manual profiling funtionality.

As I already emphasised in the comments: Don't use some homebrew definitions for registers. ST (and ARM) provide CMSIS headers for the standard peripheral modules (DWT and CoreDebug are actually ARM IPs) which you should use. This includes not using magic numbers, but the defined constants/macros.

More information can be found in the "Architecture Reference Manual". Caution: there is also an "Architecture Application Level Reference Manual", which is not what you want.

blocks|key|1085270|text|可能缺少解锁dbg+(DWT->LAR+=+0xC5ACCE55)：下面的顺序为我解决了pb：|type|unstyled|depth|inlineStyleRanges|entityRanges|data|1085271|++++++CoreDebug->DEMCR+%7C=+CoreDebug_DEMCR_TRCENA_Msk;
++++++DWT->LAR+=+0xC5ACCE55;+
++++++DWT->CYCCNT+=+0;
++++++DWT->CTRL+%7C=+DWT_CTRL_CYCCNTENA_Msk;|code-block|syntax|javascript|1085272|entityMap^0|0|0^^$0|@$1|2|3|4|5|6|7|I|8|@]|9|@]|A|$]]|$1|B|3|C|5|D|7|J|8|@]|9|@]|A|$E|F]]|$1|G|3|-4|5|6|7|K|8|@]|9|@]|A|$]]]|H|$]]

Maybe missing to unlock the dbg regs (DWT->LAR = 0xC5ACCE55):
Sequence below solved pb for me : 

<pre><code> CoreDebug-&gt;DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
 DWT-&gt;LAR = 0xC5ACCE55; 
 DWT-&gt;CYCCNT = 0;
 DWT-&gt;CTRL |= DWT_CTRL_CYCCNTENA_Msk;
</code></pre>

blocks|key|1085320|text|您所做的一切都是正确的，除了您缺少对DWT寄存器的解锁访问(正如Howard指出的那样)。在您的代码中，应该是这样的：|type|unstyled|depth|inlineStyleRanges|entityRanges|data|1085321|volatile+uint32_t+*DWT_CONTROL+=+(uint32_t+*)+0xE0001000;
volatile+uint32_t+*DWT_CYCCNT+=+(uint32_t+*)+0xE0001004;
volatile+uint32_t+*DEMCR+=+(uint32_t+*)+0xE000EDFC;
volatile+uint32_t+*LAR++=+(uint32_t+*)+0xE0001FB0;+++//+<--+added+lock+access+register

*DEMCR+=+*DEMCR+%7C+0x01000000;+++++//+enable+trace
*LAR+=+0xC5ACCE55;++++++++++++++++//+<--+added+unlock+access+to+DWT+(ITM,+etc.)registers+
*DWT_CYCCNT+=+0;++++++++++++++++++//+clear+DWT+cycle+counter
*DWT_CONTROL+=+*DWT_CONTROL+%7C+1;++//+enable+DWT+cycle+counter|code-block|syntax|javascript|1085322|注意，正如ARMv7-M体系结构参考手册中所述，锁机制只适用于软件访问。始终允许DAP访问(这就是为什么可以使用调试器启用循环计数器的原因)。|1085323|请注意，STM32F7文档和ARM文档都有一个错误，并将0xE0000FB0作为锁定访问寄存器的地址(参见这里)。使用提供的CMSIS核心寄存器定义(core_cm7.h)可以避免这个问题，因为它们是正确的，当然，正如Olaf所说的那样，效率会更高;)|offset|length|1085324|entityMap|0|LINK|mutability|MUTABLE|url|http://www.st.com/content/ccc/resource/technical/document/reference_manual/group0/96/8b/0d/ec/16/22/43/71/DM00224583/files/DM00224583.pdf/jcr:content/translations/en.DM00224583.pdf|1|http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0489c/BABJFFGJ.html|2|https://stackoverflow.com/questions/38355831/measuring-clock-cycle-count-on-cortex-m7#38360668^0|0|0|0|4|9|0|E|5|1|1H|2|2|0^^$0|@$1|2|3|4|5|6|7|Y|8|@]|9|@]|A|$]]|$1|B|3|C|5|D|7|Z|8|@]|9|@]|A|$E|F]]|$1|G|3|H|5|6|7|10|8|@]|9|@]|A|$]]|$1|I|3|J|5|6|7|11|8|@]|9|@$K|12|L|13|1|14]|$K|15|L|16|1|17]|$K|18|L|19|1|1A]]|A|$]]|$1|M|3|-4|5|6|7|1B|8|@]|9|@]|A|$]]]|N|$O|$5|P|Q|R|A|$S|T]]|U|$5|P|Q|R|A|$S|V]]|W|$5|P|Q|R|A|$S|X]]]]

You are doing everything right, except you are missing to unlock access to DWT register (as Howard pointed out).
In your code it would be something like:

<pre><code>volatile uint32_t *DWT_CONTROL = (uint32_t *) 0xE0001000;
volatile uint32_t *DWT_CYCCNT = (uint32_t *) 0xE0001004;
volatile uint32_t *DEMCR = (uint32_t *) 0xE000EDFC;
volatile uint32_t *LAR = (uint32_t *) 0xE0001FB0; // &lt;-- added lock access register

*DEMCR = *DEMCR | 0x01000000; // enable trace
*LAR = 0xC5ACCE55; // &lt;-- added unlock access to DWT (ITM, etc.)registers 
*DWT_CYCCNT = 0; // clear DWT cycle counter
*DWT_CONTROL = *DWT_CONTROL | 1; // enable DWT cycle counter
</code></pre>

Note that, as stated in ARMv7-M Architecture
Reference Manual, lock mechanism only applies to software access. DAP access is always allowed (that's why you could enable cycle counter using the debugger).

Please note that both <a href="http://www.st.com/content/ccc/resource/technical/document/reference_manual/group0/96/8b/0d/ec/16/22/43/71/DM00224583/files/DM00224583.pdf/jcr:content/translations/en.DM00224583.pdf" rel="nofollow noreferrer">STM32F7 documentation</a> and <a href="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0489c/BABJFFGJ.html" rel="nofollow noreferrer">ARM documentation</a> have a typo and give 0xE0000FB0 as address of Lock Access register (see <a href="https://stackoverflow.com/questions/38355831/measuring-clock-cycle-count-on-cortex-m7#38360668">here</a>).
Using provided CMSIS core registres definitions (core_cm7.h) would have avoided you this problem since they are correct, and of course would have been more efficient as Olaf stated ;)

blocks|key|570406|text|这对我起了作用：|type|unstyled|depth|inlineStyleRanges|entityRanges|data|570407|//address+of+the+register
volatile+unsigned+int+*DWT_CYCCNT+++=+(volatile+unsigned+int+*)0xE0001004;+++++

//address+of+the+register
volatile+unsigned+int+*DWT_CONTROL++=+(volatile+unsigned+int+*)0xE0001000;+++++

//address+of+the+register
volatile+unsigned+int+*DWT_LAR++++++=+(volatile+unsigned+int+*)0xE0001FB0;+++++

//address+of+the+register
volatile+unsigned+int+*SCB_DEMCR++++=+(volatile+unsigned+int+*)0xE000EDFC;|code-block|syntax|javascript|570408|..。|570409|*DWT_LAR+=+0xC5ACCE55;+//+unlock+(CM7)
*SCB_DEMCR+%7C=+0x01000000;
*DWT_CYCCNT+=+0;+//+reset+the+counter
*DWT_CONTROL+%7C=+1+;+//+enable+the+counter|570410|570411|x+=+*DWT_CYCCNT;|570412|..。正在测试的代码：|570413|y+=+*DWT_CYCCNT;
x+=+(y+-+x);+//+Elapsed+clock+ticks,+at+SystemCoreClock|570414|entityMap^0|0|0|0|0|0|0|0|0^^$0|@$1|2|3|4|5|6|7|T|8|@]|9|@]|A|$]]|$1|B|3|C|5|D|7|U|8|@]|9|@]|A|$E|F]]|$1|G|3|H|5|6|7|V|8|@]|9|@]|A|$]]|$1|I|3|J|5|D|7|W|8|@]|9|@]|A|$E|F]]|$1|K|3|H|5|6|7|X|8|@]|9|@]|A|$]]|$1|L|3|M|5|D|7|Y|8|@]|9|@]|A|$E|F]]|$1|N|3|O|5|6|7|Z|8|@]|9|@]|A|$]]|$1|P|3|Q|5|D|7|10|8|@]|9|@]|A|$E|F]]|$1|R|3|-4|5|6|7|11|8|@]|9|@]|A|$]]]|S|$]]

This worked for me:

<pre><code>//address of the register
volatile unsigned int *DWT_CYCCNT = (volatile unsigned int *)0xE0001004; 

//address of the register
volatile unsigned int *DWT_CONTROL = (volatile unsigned int *)0xE0001000; 

//address of the register
volatile unsigned int *DWT_LAR = (volatile unsigned int *)0xE0001FB0; 

//address of the register
volatile unsigned int *SCB_DEMCR = (volatile unsigned int *)0xE000EDFC;
</code></pre>

...

<pre><code>*DWT_LAR = 0xC5ACCE55; // unlock (CM7)
*SCB_DEMCR |= 0x01000000;
*DWT_CYCCNT = 0; // reset the counter
*DWT_CONTROL |= 1 ; // enable the counter
</code></pre>

...

<pre><code>x = *DWT_CYCCNT;
</code></pre>

... code under test:

<pre><code>y = *DWT_CYCCNT;
x = (y - x); // Elapsed clock ticks, at SystemCoreClock
</code></pre>

blocks|key|570443|text|我知道我有点晚了，但是如果其他人看过如何正确地设置DWT，您可以看上去像https://developer.arm.com/documentation/ddi0337/e/ch11s05s01|type|unstyled|depth|inlineStyleRanges|entityRanges|offset|length|data|570444|在我的示例中，使用stm32f1，就足以满足我需要将DWT设置为|570445|DWT->CTRL+=+DWT_CTRL_CYCEVTENA_Msk+%7C+DWT_CTRL_CYCCNTENA_Msk;
DWT->CYCCNT+=+0;|code-block|syntax|javascript|570446|entityMap|0|LINK|mutability|MUTABLE|url|https://developer.arm.com/documentation/ddi0337/e/ch11s05s01^0|10|1O|0|0|0|0^^$0|@$1|2|3|4|5|6|7|S|8|@]|9|@$A|T|B|U|1|V]]|C|$]]|$1|D|3|E|5|6|7|W|8|@]|9|@]|C|$]]|$1|F|3|G|5|H|7|X|8|@]|9|@]|C|$I|J]]|$1|K|3|-4|5|6|7|Y|8|@]|9|@]|C|$]]]|L|$M|$5|N|O|P|C|$Q|R]]]]

I know I am a bit late but if anyone else looks how to properly setup DWT, you can look <a href="https://developer.arm.com/documentation/ddi0337/e/ch11s05s01" rel="nofollow noreferrer">https://developer.arm.com/documentation/ddi0337/e/ch11s05s01</a>
 
In my example using the stm32f1, it is sufficient for my needs to setup DWT as
<pre><code>DWT-&gt;CTRL = DWT_CTRL_CYCEVTENA_Msk | DWT_CTRL_CYCCNTENA_Msk;
DWT-&gt;CYCCNT = 0;
</code></pre>

I am using the STM32F7-Discovery board and have been stuck at trying to enable the DWT cycle counter. From what I've seen online this should suffice for enabling it:
<pre><code>CoreDebug-&gt;DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
DWT-&gt;CYCCNT = 0;
DWT-&gt;CTRL |= 1;
</code></pre>
However, whenever I run that code the values are not changed or the operations are skipped (I am not too sure what is happening).
I've tried making pointers to the addresses in memory and altering them directly with no avail either. Ex:
<pre><code>volatile uint32_t *DWT_CONTROL = (uint32_t *) 0xE0001000;
volatile uint32_t *DWT_CYCCNT = (uint32_t *) 0xE0001004;
volatile uint32_t *DEMCR = (uint32_t *) 0xE000EDFC;
*DEMCR = *DEMCR | 0x01000000;
*DWT_CYCCNT = 0;
*DWT_CONTROL = *DWT_CONTROL | 1;
</code></pre>
Currently, the only way I've gotten the is when stepping through with the debugger in Visual Studios (with VisualGDB), if I change the value of DWT-&gt;CTRL to the ON value the cycle counter begins. Aside from that though, I cannot seem to get the value to change in code.
Edit: What could be causing the behavior where these lines of code are not performing their tasks but also not crashing and continuing.
<pre><code>CoreDebug-&gt;DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
DWT-&gt;CYCCNT = 0;
DWT-&gt;CTRL |= 1;
</code></pre>
After running these lines of codes, all of the values at those memory locations stay the same and are not altered with the operations that were supposed to be performed.
E.G. :
<pre><code>//DWT_CTRL_CYCCNTENA_Msk = 1
DWT-&gt;CTRL |= DWT_CTRL_CYCCNTENA_Msk 
</code></pre>
Should result in the value of DWT-&gt;CTRL being <code>0x40000001</code> but it remains at its default value <code>0x40000000</code>
The pictures below are an example of what is occurring during runtime.
Before:
<a href="https://i.stack.imgur.com/sGhXk.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/sGhXk.png" alt="Before" /></a>
After:
<a href="https://i.stack.imgur.com/OJMwI.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/OJMwI.png" alt="After" /></a>

STM32 - How to enable DWT Cycle counter

翻译质量差，导致语言生硬或混乱。

没有提供实际的解决方法或示例。

解答不清晰，无法理解或解决问题。

页面排版不美观，阅读体验差。

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我正在使用STM32F7-Discoveryboard，并且一直在尝试启用DWT循环计数器。从我在网上看到的情况来看，这应该足以启用它：CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;DWT->CYCCNT = 0;DWT->CTRL  |= 1;但是，每当我运行该代码时，...

问STM32 -如何启用DWT循环计数器
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